Quantum Circuit Optimization for Fault Tolerant Quantum Computing
Marc Davis, Massachusetts Institute of Technology
Quantum Circuit Optimization is technique of modifying a quantum circuit to reduce the resource costs of implementing it without changing the computational effect of the circuit. When focusing on NISQ (Noisy Intermediate-Scale Quantum) computing, the focus is generally on the reduction of the length of the circuit, especially considering the number of 2-qubit gates (e.g. CNOT count). There are a variety of approaches to this problem, but I focus on techniques based on numerical optimization, which allows efficient exploration of problems that can be defined by a cost function and a set of continuous parameters. In the context of fault-tolerant quantum computing, this task is complicated by the discrete nature of the problem: Clifford Gates can be performed efficiently, but T gates require 1-2 orders of magnitude more resources (in the form of qubits and gates used for magic state distillation), and Rz gates require 100-200 T gates to approximate in most cases. I present a numerical optimization technique for reducing the number of Rz and T gates in a quantum circuit, which can readily be combined with numerical optimization techniques for 2-qubit gate reduction. I demonstrate that this technique can match best-known T and Rz gate counts for a set of important example circuits, and demonstrate the combination of this technique with circuit partitioning to achieve a scalable tool for reducing the T and Rz counts of large quantum circuits.