Characterization of Single Event Effects at Advanced FinFET Technology Nodes
Yoni Xiong, Vanderbilt University
Electronic systems deployed for offensive and defensive purposes are often exposed to ionizing radiation in space and terrestrial environments, resulting in malfunctions due to single-event (SE) effects. These electronic systems are routinely updated with the latest transistor technologies to achieve the highest performance and capabilities. System-level vulnerability to single-event upsets (SEUs) for each such update has increased due to an increased number of components, while individual cell-level vulnerability has decreased due to decreases in transistor sizes. This work has investigated SE vulnerability of the latest semiconductor technologies — commercial 5-nm and 7-nm bulk FinFET processes — to show that cell-level SE vulnerability does not always decrease with scaling. SE vulnerability had decreased with scaling for every node until the 5-nm node. At nominal operating voltage, designs at the 5-nm node have higher SEU cross-sections than the same designs at the 7-nm node for alpha particles and thermal neutrons, with increases of 148% and 168% respectively. Technology Computer-Aided Design (TCAD) and circuit-level simulations are used to show that greater reductions in critical charge compared to collected charge are responsible for this trend reversal. Results are also presented for reduced operating voltages and for transistor variants to discuss the implications of power and speed management on SEU cross-sections. This observed reversal in the scaling trend is concerning to the semiconductor industry due to increased system-level vulnerability, especially for those with strict reliability requirements.
Abstract Author(s): Yoni Xiong, Nicholas Pieper, Alexandra Feeley, Dennis Ball, Balaji Narasimham, John Brockman, Nathaniel Dodds, Steve Wender, Shi-Jie Wen, Rita Fung, Bharat Bhuva